5 new pasture road ? newburyport, ma 01950-4040 ? phone: 978-465-6200 ? fax: 978-462-3396 ? www.accutekmicro.com accutek accutek microcircuit corporation akcm6432t 512kb secondary cache module for the pentium cpu and 82430 pcisets features 64k x 64 configuration 16k x 11 tag sram field low profile card edge module with 160 leads separate 5v and 3.3v power supplies multiple gnd pins and decoupling cap acitors for maximum noise immunity. synchronous sram with burst counter description the akcm6432t module uses four 32k x 32 pipelined burst rams in surface mount packages mounted on a multi - layer fr4 board. in addition, it uses two 5v 8 - bit wide srams to achieve an eleven bit tag field. four pd (presence detect) input pins allow the system to determine the particular cache configuration. the low profile card edge package allows 160 single leads to be placed on a package 4.35? long, a maximum of 0.350? t hick and a maximum of 1.14? tall. all inputs and outputs are tll - compatible, and operate from separate 5v (+/ - 5%) and 3.3v (+10/ - 5%) power supplies. multiple gnd pins and on - board decoupling capacitors ensure maximum protection from noise.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 gnd tio1 tio7 tio5 tio3 tio9 vcc5 tio10 cadv gnd coe cwe5 cwe7 cwe1 vcc5 cwe3 nc nc gnd nc a4 a6 a8 a10 nc a17 gnd a9 a14 a15 nc pd0 pd2 lbo gnd clk0 gnd d63 nc d61 d59 d57 gnd d55 d53 d51 d49 gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd d47 d45 d43 nc nc nc nc d41 d39 d37 d35 d33 d31 d29 d27 d25 d23 d21 d19 d17 d15 d13 d11 d9 d7 d5 d3 d1 tio0 tio2 tio6 tio4 tio8 twe cadsc nc cwe4 cwe6 cwe0 cwe2 vcc3 cs gw bwe a3 a7 a5 a11 a16 vcc3 vcc3 vcc3 vcc3 vcc3 vcc3 a18 a12 a13 cadsp nc nc pd1 pd3 clk1 d62 d60 d58 d56 d54 d52 d50 d48 d46 d44 d42 d40 d38 d36 d34 d32 d30 d28 d26 d24 d22 d20 d18 d16 d14 d12 d10 d8 d6 d4 d2 d0 pinout - top view
pin names a 5 - a 18 address inputs a 3 - a 4 address inputs (burst srams only) d 0 - d 63 cache data inputs/outputs tio 0 - tio10 tag inputs/outputs oe# cache data output enab led input twe# tag write enable input we# 0 - we# 7 cache data write enable inputs cs# cache data chip enable input (burst only) cadsc# cache address status input (burst srams only) cadsp# processor address status input (burst only) cadv# burst address advance (burst srams only) gw# global write input (burst srams only) bwe# byte write enable input (burst srams only) lbo# linear burst order clk 0 - clk 1 clock inputs (burst srams only) pd 0 - pd 4 presence detect pins nc no connect gnd ground vcc 5 5 volt power supply vcc 3 3.3 volt power supply presence detect table pd4 pd3 pd2 pd1 pd0 module nc nc nc nc nc no cache present gnd gnd nc gnd gnd 512kb pipelined burst
recommended dc operating conditions symbol parameter min. typ. max. unit vcc3 supply voltage 3.146 3.3 3.6 v vcc5 supply voltage 4.75 5 5.25 v gnd supply voltage 0 0 0 v v ih input high voltage 2.2 - vcc + 0.3 v v il input low voltage -0.5(1) - 0.8 v note: 1. v il = -1.0v for pulse width less than 5ns, once per cycle recommended operating temperature and supply voltage power plane ambient temperature gnd vcc vcc3 0 0 c to +70 0 c 0v 3.3v +10/-5% vcc5 0 0 c to +70 0 c 0v 5.0v +/- 5% absolute maximum ratings symbol rating value unit v term terminal voltage with respect -0.5 to v to gnd vcc + 0.5 v term terminal voltage with respect -0.5 to +4.6 v for vcc3 to gnd (vcc terminals only) t a operating temperature 0 to +70 0 c t bias temperature under bias -10 to +85 0 c t stg storage temperature -55 to +125 0 c i out dc output current 50 ma sram access times module speed asych burst (1) tag 66mh z 15ns 8.0ns 15ns note: 1. burst srams are measured by clock to data out (t cd ) capacitance (1,2) (t a = +25 0 c, f = 1.0 mh z ) symbol parameter(1 condition value unit c in1 input capacitance v in = 0v 30 pf (address) c in3 input capacitance v in = 0v 25 pf (oe#) c in4 input capacitance v in = 0v 8 pf (we#, twe#) c i/o i/o capacitance v out = 0v 20 pf notes: 1. these parameters are guaranteed by design but not tested 2. these parameters are maximum values
dc electrical characteristics (vcc5 = 5.0v +/- 5%, vcc = 3.3v + 10/-5%, t a = 0 0 c to 70 0 c) symbol parameter test condition min. max. unit i li input leakage current vcc = max, v in = gnd to vcc - 50 a (address) i li input leakage current vcc = max, v in = gnd to vcc - 20 a (data and control) i lo output leakage curent v out = 0v to vcc, vcc = max - 20 a v ol output low voltage i ol = 8ma, vcc = min - 0.4 v v oh output high voltage i oh = -4ma, vcc = min 2.4 - v i cc3 operating 3.3v power vcc 3 = max, ce = v il - 620 ma supply curent f = f max , outputs open i cc5 operating 5v power vcc 5 = max, ce = v il - 180 ma supply current f = f max , outputs open i sb3 standby 3.3v power vcc 3 = max, ce = v ih - 120 ma supply current f = f max , outputs open i sb31 full standby 3.3v power vcc 3 = max, ce = vcc - 0.2v, f = 0, - 60 ma supply current v in = 0.2v or v in = vcc - 0.2v, outputs open
contract no. accutek microcircuit corp. newburyport, ma 01950 dwg approvals date drawn checked issued scale sheet rev. dwg no. fscm no. size a coast module akcm6432t 1 gn 11/21/07 1 of 2 160 rev1 akcm6432t 4.340" 1.130" 0.500" 0.110" 0.074" 0.300"
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